VIAAPM.SYS: Difference between revisions
Created page with "VIA KT266A power management. DEVICE=VIAAPM.SYS '''Note:''' Replace APM.SYS by APM_NH.SYS Provides the following services: * CPU idle hook for APM KPI (APM_IdleHook..." |
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VIA KT266A power management. | {{ProdS |V21= |V22= |V30=*|V31=*|V40=S|V45=S}} | ||
VIA KT266A power management. | |||
DEVICE=VIAAPM.SYS | DEVICE=VIAAPM.SYS | ||
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The "throttling API" enables the user to slow down the CPU by selectively filtering out CPU clock cycles. In KT266A chipset, this method is particularly useful for cooling down the 8366 memory controller ("northbridge") which imposes a noticeable source of heat besides the CPU. | The "throttling API" enables the user to slow down the CPU by selectively filtering out CPU clock cycles. In KT266A chipset, this method is particularly useful for cooling down the 8366 memory controller ("northbridge") which imposes a noticeable source of heat besides the CPU. | ||
[[Category:DEVICE Statements]] | [[Category:DEVICE Statements]] |
Latest revision as of 14:23, 10 April 2019
Product Support | |
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OS/2 1.3 | |
OS/2 2.0 | |
OS/2 2.1 | |
OS/2 2.11 SMP | |
OS/2 Warp 3 | * |
OS/2 Warp Connect | * |
OS/2 Warp 4 | S |
OS/2 Warp Server for e-Business | S |
VIA KT266A power management.
DEVICE=VIAAPM.SYS
Note: Replace APM.SYS by APM_NH.SYS
Provides the following services:
- CPU idle hook for APM KPI (APM_IdleHookRtn).
- CPU throttling API.
The APM idle hook routine replaces the OS/2's standard idle operation (HLT x86 instruction). The reason for it is that HLT corresponds to ACPI "C1" level of CPU operation (CPU still connected to bus and consumes its full rated power). The "C2" level, provided by the idle hook, disconnects the CPU from its bus, dropping the power consumption by about 10 times and putting the CPU into so-called "Stop Grant state". CPU returns from this state in the same ways as from "C1", therefore the performance losses are insignificant.
The "throttling API" enables the user to slow down the CPU by selectively filtering out CPU clock cycles. In KT266A chipset, this method is particularly useful for cooling down the 8366 memory controller ("northbridge") which imposes a noticeable source of heat besides the CPU.