Verilog: Difference between revisions
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Verilog, also known as '''IEEE1364''' is a hardware description language based on [[C]] that is used to describe analogue or digital integrated circuits, it can be used to program gate arrays and FPGAs but is not as popular in that respect as [[VHDL]]. | Verilog, also known as '''IEEE1364''' is a hardware description language based on [[C]] that is used to describe analogue or digital integrated circuits, it can be used to program gate arrays and FPGAs but is not as popular in that respect as [[VHDL]]. | ||
====Verilog related programmer's utilities==== | |||
* [[Exuberant ctags]] - Creates index files out of Verilog source files - Open source - Current. | |||
====OS/2 text & programmers editors with VHDL file support==== | ====OS/2 text & programmers editors with VHDL file support==== | ||
Revision as of 22:48, 26 February 2016
Verilog, also known as IEEE1364 is a hardware description language based on C that is used to describe analogue or digital integrated circuits, it can be used to program gate arrays and FPGAs but is not as popular in that respect as VHDL.
- Exuberant ctags - Creates index files out of Verilog source files - Open source - Current.
OS/2 text & programmers editors with VHDL file support
- Lugaru Epsilon - Verilog syntax highlighting and autoindent available as a seperate download. - Commercial.
- NEdit - XFree86 - Autoindent, autocomplete and syntax highlighting - Open source - Discontinued.